This course is intended for students planning to pursue a course of study in engineering with a concentration in electrical engineering or computer engineering. Topics include numbers and coding systems; Boolean algebra with applications to logic systems; Karnaugh and Quine-McCluskey minimization; combinatorial logic design; flip-flops; sequential network design; and design of digital logic circuits. Lab work will include working with digital logic integrated circuits, breadboard, multimeter, function generator, and oscilloscope in the labs. Labs will also incorporate the use of an industry standard digital circuit simulation software package.
Goals, Topics, and Objectives
- Binary Systems
- Describe binary arithmetic and binary codes including weighted binary codes, non-weighted binary codes, alphanumeric codes
- Boolean Algebra and Logic Gates
- Describe Boolean Expressions and Truth Tables
- Conduct Algebraic Simplification of Switching Expressions
- Apply basic Multiplying out and Factoring in Boolean Algebra
- Explain Complementing Boolean Expressions
- Describe the Consensus Theorem
- Simplify Algebraic of Switching Expressions
- Gate-level Minimization
- Describe Karnaugh and Quine-McCluskey minimization methods
- Explain Two- and Three-Variable, and Four-Variable Karnaugh Maps
- Identify Prime Implicants
- Simplify Incompletely Specified Functions
- Combinational Logic Design
- Describe Combinational Circuit Design method
- Analyze Circuits with Limited Gate Fan-In
- Describe Gate Delays and Timing Diagrams
- Identify Multiplexers and Three-State Buffers
- Introduction Logic Design using VHDL
- Describe Application of VHDL in Combinational Circuits
- Name VHDL Models for Multiplexers
- Name VHDL Modules
- Describe Signals and Constants and Arrays in VHDL
- Open VHDL Packages and Libraries
- Compile a VHDL Code
- Flip-Flops and Sequential Logic Design
- Describe Edge-Triggered D Flip-Flop, S-R Flip-Flop, J-K Flip-Flop, and T Flip-Flop
- Name the Steps on Design of a Sequence Detector
- Analyze Sequential Logic Design by Signal Tracing and Timing Charts
- Registers and Counters
- Identify Register Transfers and Shift Registers
- Name the Steps on Design of Binary Counters
- Describe Counter Design Using S-R and J-K Flip-Flops
- Sequential Circuit Design
- Summarize Design Procedure for Sequential Circuits
- Describe Design of Sequential Circuits Using ROMs, PLAs, or CPLDs.
- Describe Simulation and Testing of Sequential Circuits
- VHDL for Sequential Logic and Digital System Design
- Describe VHDL Modeling Processes for Flip-Flops, Registers and Counters, and Combinational Logic
- Synthesize a VHDL Code
- Analyze a VHDL Code for a Serial Adder, Binary Multiplier, or a Binary Divider
This class has not run since 2019. The class does not transfer to the University of Michigan - Dearborn.
Assessment and Requirements
Student learning will be assessed through classroom examinations including a cumulative final exam. Students will submit a written lab report for each experiment performed. The lab report will be used to determine if the student followed instructions, collected the data correctly, analyzed the data, and was able to draw the correct conclusions from the analysis. Problem solving skills will be evaluated using assigned problems turned in by hand or using an online homework site and on the class exams. Conceptual understanding will be evaluated through classroom discussions and on the class exams.
Students should complete at least one major computer project involving circuit simulation requiring the design of a digital circuit.
FUNDAMENTALS OF LOGIC DESIGN By ROTH EDITION: 7TH , PUBLISHER: CENGAGE L., ISBN: 9781133628477